Adaptive radios capable of dynamically trading off energy for signal-to-noise ratio (SNR) slack can enable significant power savings, but developing a fully reconfigurable analog front-end, which achieves suitable performance in digital-optimized process technology presents a major challenge to building low-power adaptive radios. Two of the major functions of an analog receiver front-end-blocker include rejection filtering and low-noise amplification for digital CMOS processes. However, a challenge remains to implement these functions while reducing manufacturing cost and leveraging the advantages of high-speed process technologies.
In one example, there is ongoing interests in improving resolution and accuracy of microwave circuit phase shifters. This is further motivated by the role of phase shifters covering 360 degrees and maintaining a small footprint area of chips while using different technologies, including delay lines, signal reflection, high pass/low-pass networks, all-pass networks, or vector summation as with vector-sum phase shifters.